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1/12 l6204 july 2003 n supply voltage up to 48v n r ds(on) 1.2 w l6204 (25c) n cross conduction protection n thermal shutdown n 0.5a dc current n ttl/cmos compatible driver n high efficiency chopping n multipower bcd technology description the l6204 is a dual full bridge driver for motor control applications realized in bcd technology which combines isolated dmos power transistors with cmos and bipolar circuits on the same chip. by using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible performance. the logic inputs are ttl/cmos compatible. both channels are controlled by a separate enable. each bridge has a sense resistor to control the currenrt level. the l6204 is mounted in an 20-lead powerdip and so 24+2+2 packages and the four center pins are used to conduct heat to the pcb. at normal oper- ating temperatures no external heatsink is re- quired. powerdip 16+2+2 so 24+2+2 ordering numbers: l6204 l6204d dmos dual full bridge driver block diagram sense 1 gnd sense 2 thermal shut down charge pump in4 enable 2 in3 vs2 out 3 out 4 vs1 out 1 out 2 vboot in1 enable 1 in2 bootstrap oscillator multopower bcd technology
l6204 2/12 pin connections pin description (*) for so package the pins 4, 5, 10, 11, 18, 19, 24 and 25 are not connected. so pin (*) dip pin symbols functions 1 1 sense 1 sense resistor to provide the feedback for motor current control of the bridge a 2 2 in1 digital input from the motor controller (bridge a) 3 3 enable 1 a logic level low on this pin disable the bridge a 6 4 out 1 output of one half bridge of the bridge a 7 5 gnd common power ground 8 6 gnd common power ground 9 7 out 3 ouput of one half bridge of the bridge b 12 8 enable 2 a logic level low on this pin disable the bridge b 13 9 in 3 digital input from the motor controller (bridge b) 14 10 sense 2 sense resistor to provide the feedback for motor current control of the bridge b 15 11 boostrap osc. vcp oscillator output for the external charge pump 16 12 in 4 digital input from the motor controller (bridge b) 17 13 out 4 output of one half bridge of the bridge b 20 14 v s 2 supply voltage bridge b 21 15 gnd common power ground 22 16 gnd common power ground 23 17 v s 1 supply voltage bridge a 26 18 out 2 output of one half bridge of the bridge a 27 19 in 2 digital input from the motor controller (bridge a) 28 20 vboot overvoltage input for driving of the upper dmos 1 3 2 4 5 6 7 8 9 20 19 18 17 16 14 15 13 12 dip20 10 11 gnd out3 enable2 sense2 in3 in4 vcp out4 vs2 gnd sens1 in1 enable1 out1 gnd gnd vs1 out2 in2 vboot sense1 in1 enable1 n.c. n.c. gnd out1 gnd out3 vs2 gnd gnd n.c. vs1 n.c. out2 in2 vboot 1 3 2 4 5 6 7 8 9 26 25 24 23 22 20 21 19 27 10 28 n.c. n.c. so24+2+2 n.c. enable2 in3 in4 out4 n.c. 11 12 13 18 16 17 15 14 sense2 vcp dip16+2+2 so24+2+2
3/12 l6204 absolute maximum ratings thermal data electrical characteristcs symbol parameter value unit v s supply voltage 50 v v in , v en input or enable voltage range -0.3 to +7 v i o pulsed output current 3 a v sense sensing voltage -1 to 4 v v boot bootstrap supply 60 v p tot total power dissipation: (t pins = 80c) (t amb = 70c no copper area on pcb) (t amb = 70c 8cm 2 copper area on pcb) 5 1.23 2 w w w t stg , t j storage and junction temperature -40 to 150 c symbol parameter so dip unit r th j-pins thermal resistance junction-pins max 16 14 c/w r th j-amb thermal resistance junction-ambient max 73 65 c/w symbol parameter test condition min. typ. max. unit v s supply voltage 12 48 v i s total quiescent current en1=en2=h; in1=in2=in3=in4=l en1 = en2 = l 10 10 ma ma f c commutation frequency 20 khz t j thermal shutdown 150 c t d dead time protection 500 ns transistors i dss leakage current off 1 ma r ds on resistance on 1.2 w logic levels v inl , v enl input low voltage -0.3 0.8 v v inh , v enh input high voltage 2 7 v i inl , i enl input low current in1 = in2 = in3 = in4 = en1 = en2 = l -10 m a i inh , i enh input high current in1 = in2 = in3 = in4 = en1 = en2 = h 50 m a
l6204 4/12 application diagram circuit description l6204 is a dual full bridge ic designed to drive dc motors, stepper motors and other inductive loads. each bridge has 4 power dmos transistor with r dson = 1.2 w and the relative protection and control circuitry. (see fig. 3) the 4 half bridges can be controlled independently by means of the 4 inputs in!, in2, in3, in4 and 2 en- able inputs enable1 and enable2. external connections are provided so that sensing resistors can be added for constant current chopper applications. logic drive (*) l = low h = high x = dont care (*) true table for the two full bridges inputs output mosfets en1=en2=h in1 in2 in3 in4 l l sink 1, sink 2 l h sink 1, source 2 h l source 1, sink 2 h h source 1, source 2 en1=en2=l x x all transistor turned off stepper motor a b vs2 out3 out4 out2 out1 vs1 d1 c1 vboot in1 enable1 in2 charge pump thermal shut down bootstrap oscillator c2 d2 sense1 sense1 rs1 gnd sense2 sense2 rs2 vs in4 enable 2 in3
5/12 l6204 cross conduction although the device guarantees the absence of cross-conduction, the presence of the intrinsic diodes in the power dmos structure causes the generation of current spikes on the sensing terminals. this is due to charge-discharge phenomena in the capacitors c1 & c2 associated with the drain source junctions (fig. 1). when the output switches from high to low, a current spike is generated associated with the capacitor c1. on the low-to-high transition a spike of the same polarity is generated by c2, preceded by a spike of the opposite polarity due to the charging of the input capacity of the lower power dmos transistor (see fig. 2). figure 1. intrinsic structures in the power mos transistors figure 2. current typical spikes on the sensing pin
l6204 6/12 transistor operation on state when one of the power dmos transistors is on it can be considered as a resistor r ds(on) = 1.2 w at a junction temperature of 25c. in this condition the dissipated power is given by : p on = r ds(on) i ds 2 the low r ds(on) of the multipower-bcd process can provide high currents with low power dissipation. off state when one of the power dmos transistor is off the vds voltage is equal to the supply voltage and only the leakage current idss flows. the power dissipation during this period is given by : p off = v s i dss transitions like all mos power transistors the dmos power transistors have as intrinsic diode between their source and drain that can operate as a fast freewheeling diode in switched mode applications. during recirculation with the enable input high, the voltage drop across the transistor is rds(on) . id and when the voltage reaches the diode voltage it is clamped to its characteristic. when the enable input is low, the power mos is off and the diode carries all of the recirculation current. the power dissipated in the transitional times in the cycle depends upon the voltage and current waveforms in the application. p trans = i ds (t) v ds (t) bootstrap capacitors to ensure the correct driving of high side drivers a voltage higher than v s is supplied on pin 20 (v boot ). this bootstrap voltage is not needed for the lower power dmos transistor because their sources are grounded. to produce this voltage a charge pump method is used and made by two external capacitors and two diodes. it can supply the 4 driving blocks of the high side drivers. using an external capacitor the turn-on speed of the high side driver is very high; furthermore with different capacitance values it is pos- sible to adapt the device to different switching frequencies. it is also possible to operate two or more l6204s using only 2 diodes and 2 capacitance for all the ics; all the vboot pins are connected to the cs- tore capacitance while the pin 11 (vcp) of just one l6204 is connect to c pump , obviously all the l6204 ics have to be connected to the same v s . (see fig. 6) figure 3. two phase chopping in1 = h in2 = l en1 = h in1 = l in2 = h en1 = h
7/12 l6204 figure 4. one phase chopping figure 5. enable chopping figure 6. dead time to protect the device against simultaneous conduction in both arms of the bridge and the resulting rail-to- rail short, the logic circuits provide a dead time. thermal protection a thermal protection circuit has been included that will disable the device if the junction temperature reach- es 150 c. when the temperature has fallen to a safe level the device restarts under the control of the input and enable signals. in1 = h in2 = l en1 = h in1 = h in2 = h en1 = h in1 = h in2 = l en1 = h in1 = x in2 = x en1 = l
l6204 8/12 application information recirculation during recirculation with the enable input high, the voltage drop across the transistor is r ds(on) . i l for voltages less than 0.7 v and is clamped at a voltage depending on the characteristics of the source-drain diode for greater voltages. although the device is protected against cross conduction, current spikes can appear on the current sense pin due to charge/discharge phenomena in the intrinsic source drain capac- itances. in the application this does not cause any problems because the voltage created across the sense resistor is usually much less than the peak value, although a small rc filter can be added if necessary. power dissipation (each bridge) in order to achieve the high performance provided by the l6204 some attention must be paid to ensure that it has an adequate pcb area to dissipate the heat. the first stage of any thermal design is to calculate the dissipated power in the appl ication, for this example the half step operation shown in figure 7 is con- sidered. rise time t r when an arm of the half bridge is turned on current begins to flow in the inductive load until the maximum current i l is reached after a time t r . the dissipated energy e off/on is in this case : e off/on = [r ds(on) i l 2 t r ] 2/3 figure 7. on time t on during this time the energy dissipated is due to the on resistance of the transistors e on and the commu- tation e com . as two of the power dmos transistors are on e on is given by : e on = i l 2 r ds(on) 2 t on in the commutation the energy dissipated is : e com = v s i l t com f switch t on where : t com = commutation time and it is assumed that ; t com = t turn-on = t turn-off = 100 ns f switch = chopper frequency
9/12 l6204 fall time t f for this example it is assumed that the energy dissipated in this part of the cycle takes the same form as that shown for the rise time : e on/off = [r ds(on) i l t f ] 2/3 quiescent energy the last contribution to the energy dissipation is due to the quiescent supply current and is given by : e quiescent = i quiescent v s t total energy per cycle e tot = (e off/on + e on + e com + e on/off ) bridge 1 + (e off/on + e on + e com + e on/off )bridge 2 + + e quiescent the total power dissipation pdis is simply : p dis = e tot /t t r = rise time t on = on time t f = fall time t d = dead time t = period t = t r + t on + t f + t d
l6204 10/12 dim. mm inch min. typ. max. min. typ. max. a1 0.51 0.020 b 0.85 1.40 0.033 0.055 b 0.50 0.020 b1 0.38 0.50 0.015 0.020 d 24.80 0.976 e 8.80 0.346 e 2.54 0.100 e3 22.86 0.900 f 7.10 0.280 i 5.10 0.201 l 3.30 0.130 z 1.27 0.050 powerdip 20 outline and mechanical data
11/12 l6204 so28 dim. mm inch min. typ. max. min. typ. max. a 2.65 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 c 0.5 0.020 c1 45 (typ.) d 17.7 18.1 0.697 0.713 e 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 f 7.4 7.6 0.291 0.299 l 0.4 1.27 0.016 0.050 s8 (max.) outline and mechanical data
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